This invention relates to radio frequency modulation and in particular to a radio frequency modem having an improved binary transversal filter for converting encoded binary data into duobinary data.
In a transversal filter, a signal is passed through a delay line. A portion of the signal is tapped off at various points along the delay line and summed. The weight of the signal contribution to the sum at each tapped point can be changed as a variable; the location where the signal is tapped off along the delay line can also be changed as a variable. The sum of all of the weighted signals yields the output from the transversal filter. A binary transversal filter uses flip-flops to construct the delay line, such as a shift register, with the input to the delay line being a binary bit stream, binary vector or binary signal that ripples through the shift register.
A conventional binary transversal filter is disclosed in IEEE transactions on communication technology, Vol. COM-16, No. 1, 1968, pp. 81-93, "Generation of Digital Signal Wave Forms" by H. B. Volker, which is hereby incorporated by reference. In accordance wwith the disclosed binary transversal filter, the plurality of stages of shift registers are driven by timing signals, the frequency of which is M times greater than the frequency of the clock pulses of the signals being introduced into the shift register.
U.S. Pat. Nos. 3,543,009 and 4,323,864, both of which are hereby incorporated by reference, disclose binary transversal filters in which a plurality of shift registers are driven by timing signals at a frequency an integral multiple greater than the frequency of clock pulses of the signals being introduced into the shift register.
The above technique of using a clock frequency that is an integral multiple of the clock frequency of the signals being introduced into the shift register to drive the stages of the shift register cannot be utilized in a manufacturing automation protocol (MAP) modem designed in accordance with IEEE Standard 802.4 and employ complementary metal oxide semiconductors (CMOS) circuitry in the binary transversal filter delay line. The data transmission rate for a MAP modem is 10 megabits per second and thus a faster logic family would be required, a logic family such as emitter coupled logic. The shortcomings of these logic families is that the logic swing between a logic 0 and logic 1 does not go between two relatively well defined states such as ground and supply as the logic swing in the CMOS family of logic does. Thus, to use another logic family would necessitate additional buffers to establish a well defined voltage swing.